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The World Is Not Enough: Another Look on Second-Order DPA
Standaert F., Veyrat-Charvillon N., Oswald E., Gierlichs B., Medwed M., Kasper M., Mangard S.
International Conference on the Theory and Application of Cryptology and Information Security
Practical Attacks on Masked Hardware
Popp T., Kirschbaum M., Mangard S.
Topics in Cryptology - CT-RSA 2009, The Cryptographers' Track at the RSA Conference 2009
Power Analysis Attacks - Revealing the Secrets of Smart Cards
Mangard S., Oswald M., Popp T.
Springer, 2007
Power Analysis Attacks and Countermeasures
Popp T., Mangard S., Oswald M.
IEEE design & test of computers, Vol. 24(6), 2007
Power and EM Attacks on Passive 13.56 MHz RFID Devices
Hutter M., Mangard S., Feldhofer M.
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings
Protecting AES Software Implementations on 32-bit Processors against Power Analysis
Tillich S., Herbst C., Mangard S.
Applied Cryptography and Network Security
Template Attacks on Masking - Resistance Is Futile
Oswald E., Mangard S.
Cryptographers´ Track at the RSA Conference
Evaluation of the Masked Logic Style MDPL on a Prototype Chip
Popp T., Kirschbaum M., Zefferer T., Mangard S.
Cryptographic Hardware and Embedded Systems - CHES 2007
Implementation Aspects of the DPA-Resistant Logic Style MDPL
Popp T., Mangard S.
IEEE International Symposium on Circuits and Systems
Practical Second-Order DPA Attacks for Masked Smart Card Implementations of Block Ciphers
Oswald M., Mangard S., Herbst C., Tillich S.
Topics in Cryptology - CT-RSA 2006
An AES Smart Card Implementation resitant to Power Analysis Attacks
Herbst C., Oswald M., Mangard S.
Applied cryptography and Network security
Pinpointing the Side-Channel Leakage of Masked CMOS Implementations
Mangard S., Schramm K.
Cryptographic Hardware and Embedded Systems - CHES 2006
Side Channel Analysis Resistant Design Flow
Aigner M., Popp T., Mangard S., Trifiletti A., Menicocci R., Olivieri M., Scotti G.
IEEE International Symposium on Circuits and Systems
Verfahren und Schaltung zur Durchführung von Rechenoperationen
Popp T., Mangard S., Aigner M.
SCARD D7.1 Specification SCARD Chip
Roth M., Tillich S., Aigner M., Popp T., Mangard S.
2005
SCARD D2.3 DPA Proof Logic Styles - Technical Report
Popp T., Mangard S., Aigner M.
2005
SCARD D6.1 Final Report Modeling & Simulation of SCA Effects
Trifiletti A., Popp T., Aigner M., Mangard S., Batina L.
2005
SCARD D2.4 Final Report Logic & Cell Library Development
Aigner M., Popp T., Mangard S.
2005
Side-Channel Leakage of Masked CMOS Gates
Mangard S., Popp T., Gammel B.
Topics in Cryptology - CT-RSA 2005, The Cryptographers' Track at the RSA Conference 2005, San Francisco, CA, USA, February 14-18, 2005, Proceedings
Successfully Attacking Masked AES Hardware Implementations
Mangard S., Pramstaller N., Oswald M.
Cryptographic Hardware and Embedded Systems - CHES 2005